aarch32: Fix L2CTRL definition for Cortex A57 and A72

Fixes ARM-software/tf-issues#495

Change-Id: I6a0aea78f670cc199873218a18af1d9cc2a6fafd
Signed-off-by: Dimitris Papastamos <[email protected]>

diff --git a/include/lib/cpus/aarch32/cortex_a57.h b/include/lib/cpus/aarch32/cortex_a57.h
index 1c3fa25cb6cff70bccaaad7351bb6e66ddb46098..1486b9807bb68be6cff86b2feb4db6c26a65984a 100644 (file)
--- a/include/lib/cpus/aarch32/cortex_a57.h
+++ b/include/lib/cpus/aarch32/cortex_a57.h
@@ -55,7 +55,7 @@
 /*******************************************************************************
  * L2 Control register specific definitions.
  ******************************************************************************/
-#define CORTEX_A57_L2CTLR                      p15, 1, c9, c0, 3
+#define CORTEX_A57_L2CTLR                      p15, 1, c9, c0, 2
 
 #define CORTEX_A57_L2CTLR_DATA_RAM_LATENCY_SHIFT 0
 #define CORTEX_A57_L2CTLR_TAG_RAM_LATENCY_SHIFT        6

diff --git a/include/lib/cpus/aarch32/cortex_a72.h b/include/lib/cpus/aarch32/cortex_a72.h
index a550192cd5ad610b983b54b6ac29b9f52c9617e7..59057bc5a3f2b2650385ade9daf3118591c5871f 100644 (file)
--- a/include/lib/cpus/aarch32/cortex_a72.h
+++ b/include/lib/cpus/aarch32/cortex_a72.h
@@ -37,7 +37,7 @@
 /*******************************************************************************
  * L2 Control register specific definitions.
  ******************************************************************************/
-#define CORTEX_A72_L2CTLR                      p15, 1, c9, c0, 3
+#define CORTEX_A72_L2CTLR                      p15, 1, c9, c0, 2
 
 #define CORTEX_A72_L2CTLR_DATA_RAM_LATENCY_SHIFT 0
 #define CORTEX_A72_L2CTLR_TAG_RAM_LATENCY_SHIFT        6